The invention relates generally to solid state imagers, and more specifically to a storage capacitor design for solid state imagers.
Solid state radiation imagers typically comprise a large flat panel imaging device comprising a plurality of pixels arranged in rows and columns. Each pixel typically has a photosensor such as a photodiode coupled via a switching transistor (e.g., a thin film field effect transistor) to two separate address lines, a scan line and a data line. In each row of pixels, each respective switching transistor is coupled to a common scan line through that transistor's gate electrode. In each column of pixels, the readout electrode of the transistor (e.g., the source electrode of the transistor) is coupled to a data line. During nominal operation, radiation (such as an x-ray flux) is pulsed on and the x-rays passing through the subject being examined are incident on the imaging array. The radiation is incident on a scintillator material and the pixel photosensors measure (by way of change in the charge across the diode) the amount of light generated by x-ray interaction with the scintillator. Alternatively, the x-rays can directly generate electron-hole pairs in the photosensor (commonly called “direct detection”). The photosensor charge data are read out by sequentially enabling rows of pixels (by applying a signal to the scan line causing the switching transistors coupled to that scan line to become conductive), and reading the signal from the respective pixels thus enabled via respective data lines (the photodiode charge signal being coupled to the data line through the conductive switching transistor and associated readout electrode coupled to a data line). In this way a given pixel can be addressed through a combination of enabling a scan line coupled to the pixel and reading out at the data line coupled to the pixel.
One problem with such solid state radiation imagers is the limited dynamic range. Typically, the dynamic range can be increased by increasing the diode bias and the diode capacitance. Increasing the diode bias generally results in increased diode leakage and FET leakage when the diode is near or above saturation and may require large transistor gate control voltages to reduce the leakage. Another typical solution to increase the dynamic range is to increase the diode capacitance. Increasing the diode capacitance may require a thinner diode i-layer since the diode capacitance is inversely proportional to the diode thickness. Reducing the thickness of the diode i-layer results in higher leakage currents, which is undesirable.
It would therefore be desirable to provide increased dynamic range for the detector without increasing the diode leakage, FET leakage and pixel shorts.